Verilog
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CDL cycle language, compiler, simulator v.1.0.18
Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog.
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Doxverilog v.2.6
Doxverilog is a nativ Verilog/SystemVerilog parser for the Doxygen documentation generator.
IVIonOSX v.rc
Icarus Verilog Interactive on MacOSX
Karnaugh Studio v.2.0
Karnaugh Studio is a product line for students of engineering and professionals, which offers the possibility to obtaining the best solution to the simplification of boolenas functions using the map of karnaugh to show it.
HDL Designer v.2006.1
HDL Designer combines deep analysis capabilities, advanced creation editors, and complete project and flow management, to deliver a powerful HDL design environment that increases the productivity of individual engineers and teams (local or remote) an
Wave VCD Viewer v.1.0.0.1
Wave VCD viewer is designed to bring digital design simulation results to your desktop PC. In a digital design environment the HDL designs are typically simulated in EDA workstations.
ProChip Designer v.5.0
Full-featured EDA suite with state-of-the-art, Mentor Graphics synthesis and simulation tools integrated into a user-friendly design environment.
HDL Works HDL Companion v.2 4
HDL Companion is the HDL designer's Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources.
MAX+plus II BASELINE v.10 2
The MAX+PLUS II BASELINE software includes support for selected FLEX, ACEX and MAX devices.
Microsoft Giano v.3 1
Giano is a simulation framework for the full-system simulation of arbitrary computer systems, with special emphasis on the hardware-software co-development of system software and Real-Time embedded applications.